There are three industry standard ESD specification models. An I/O pad meeting all three requirements measures the robustness of a design; however not all customers require passing each of these test on a given integrated circuit during qualification. These ESD specifications are as follows.
Human Body Model (HBM)
Using a series 1.5K-ohm resistor to a 100-pF capacitor. Specification is 2kv
with a goal of 4kv. The ramp rate is specified to be less than or equal to 10
nanoseconds. Tests for all of these models must be run on a certified
ESD tester due to the need for very high frequency components necessary to guarantee
the very fast ramp rates, high voltage inputs, and a safe test environment for
the operator. Inductance of the wiring interconnect must be minimized by utilizing
short wires, braided 3/8 inch copper or better, and appropriate ground planes.
Also, special high speed, high voltage capacitors are required for both the
100 pF and 200 pF capacitors.
Machine Model (MM)
Using "no series resistor" and 200-pF capacitor - specification is
250 volts with an acceptance of greater than 350 volts and a goal of 700 volts.
Charge Device Model (CDM)
Requires a special setup for each package pin type. The "standard"
new test may not be accepted. The specification is 1000 volts with a design
goal of 1500 volts. There are a number of aspects that must be addressed for
good ESD protection. Each of the three conditions shown above addresses a different
cause of failure; and each must be considered in order to guarantee a robust
design. Even though the "cause of failure" may be different, many
times the failure mechanism within the IC may be the same or very similar. ESD
protection is "from a given pin to any other pin."
General Discussion
Discussion of "Salicided" CMOS Process
ESD Design Methodology